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  low skew, 1-to-4 differential-to- lvds fanout buffer ICS889832 idt ? / ics ? lvds fanout buffer 1 ICS889832ak rev a september 19, 2006 g eneral d escription the ICS889832 is a high speed 1-to-4 differential- to-lvds fanout buffer and is a member of the hiperclocks ? family of high performance clock solutions from idt. the ICS889832 is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as sonet, 1 gigabit and 10 gigabit ethernet, and fibre channel. the internally terminated differential input and v ref _ ac pin allow other differential signal families such as lvpecl, lvds, and sstl to be easily interfaced to the input with minimal use of external components. the device also has an output enable pin which may be useful for system test and debug purposes. the ICS889832 is packaged in a small 3mm x 3mm 16-pin vfqfn package which makes it ideal for use in space- constrained applications. f eatures ? four differential lvds outputs ? in, nin pair can accept the following differential input levels: lvpecl, lvds, sstl ? 50 ? internal input termination to v t ? output frequency: >2ghz ? output skew: 25ps (maximum) ? part-to-part skew: 200ps (maximum) ? additive phase jitter, rms: <0.2ps (typical) ? propagation delay: 510ps (maximum) ? 2.5v operating supply ? -40c to 85c ambient operating temperature ? available in both standard (rohs 5) and lead-free (rohs 6) packages b lock d iagram p in a ssignment hiperclocks? ic s in v t nin q0 nq0 q1 nq1 q2 nq2 q3 nq3 v ref_ac ICS889832 16-lead vfqfn 3mm x 3mm x 0.95 package body k package top view q1 nq1 q2 nq2 in v t v ref _ ac nin q3 nq3 v dd en nq0 q0 v dd gnd 1 2 3 4 12 11 10 9 5 6 7 8 16 15 14 13 50 ? 50 ? dq en
idt ? / ics ? lvds fanout buffer 2 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u r p u l l u p r o t s i s e r p u l l u p t u p n i 7 3k ? r e b m u ne m a ne p y tn o i t p i r c s e d 2 , 11 q n , 1 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 4 , 32 q n , 2 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 6 , 53 q n , 3 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 4 1 , 7v d d r e w o p. s n i p y l p p u s e v i t i s o p 8n et u p n ip u l l u p q n d n a w o l o g l l i w s t u p t u o q , w o l n e h w . e l b a n e k c o l c g n i z i n o r h c n y s t u p n i . s t u p n i n i t a n o i t i s n a r t w o l t x e n e h t n o h g i h o g l l i w s t u p t u o v s i d l o h s e r h t d d k 7 3 a s e d u l c n i . v 2 / ? s i e t a t s t l u a f e d . r o t s i s e r p u - l l u p e g d e g n i l l a f e h t n o d e k c o l c s i h c t a l l a n r e t n i e h t . g n i t a o l f t f e l n e h w h g i h . s l e v e l e c a f r e t n i s o m c v l / l t t v l . n i l a n g i s t u p n i e h t f o 9n i nt u p n i0 5 . t u p n i k c o l c l a i t n e r e f f i d g n i t r e v n i ? v o t n o i t a n i m r e t t u p n i l a n r e t n i t . 0 1v c a _ f e r t u p t u o. s n o i t a c i l p p a d e l p u o c - c a r o f e g a t l o v e c n e r e f e r 1 1v t t u p n i. t u p n i n o i t a n i m r e t 2 1n it u p n i0 5 . t u p n i k c o l c l a i t n e r e f f i d g n i t r e v n i - n o n ? v o t n o i t a n i m r e t t u p n i l a n r e t n i t . 3 1d n gr e w o p. d n u o r g y l p p u s r e w o p 6 1 , 5 10 q n , 0 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d : e t o n p u l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t s r e f e r
idt ? / ics ? lvds fanout buffer 3 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer t able 3a. c ontrol i nput f unction t able t able 3b. t ruth t able t u p n is t u p t u o n e3 q : 0 q3 q n : 0 q n 0w o l ; d e l b a s i dh g i h ; d e l b a s i d 1d e l b a n ed e l b a n e d e l b a n e r o d e l b a s i d e r a s t u p t u o k c o l c e h t , s e h c t i w s n e r e t f a n i n w o h s s a e g d e k c o l c t u p n i g n i l l a f a g n i w o l l o f r u g i f e . 1 f igure 1. en t iming d iagram en nin in nqx qx s t u p n is t u p t u o n in i nn e3 q : 0 q3 q n : 0 q n 01101 10 1 10 xx00 ) 1 e t o n ( 1 ) 1 e t o n ( . ) n i ( l a n g i s t u p n i e h t f o n o i t i s n a r t e v i t a g e n t x e n n o : 1 e t o n t pd t s t h v out swing v dd /2 v dd /2 v in
idt ? / ics ? lvds fanout buffer 4 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer t able 4a. p ower s upply dc c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c a bsolute m aximum r atings note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional op- eration of product at these conditions or any conditions beyond those listed in the dc characteristics or ac characteristics is not implied. exposure to absolute maximum rating conditions for ex- tended periods may affect product reliability. supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5 v outputs, i o (lvds) contin uous current 10ma surge current 15ma input current, in, nin 50ma v t current, i vt 100ma input sink/source, i ref_ac 0.5ma operating temperature range, ta -40c to +85c storage temperature, t stg -65c to 150c package thermal impedance, ja 51.5c/w (0 lfpm) (junction-to-ambient) t able 4b. lvcmos/lvttl dc c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c t able 4c. d ifferential dc c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e v i t i s o p 5 7 3 . 25 . 25 2 6 . 2v i d d t n e r r u c y l p p u s r e w o p 0 2 1a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i 7 . 1v d d 3 . 0 +v v l i e g a t l o v w o l t u p n i 07 . 0v i h i t n e r r u c h g i h t u p n in ev d d v = n i v 5 2 6 . 2 =5a i l i t n e r r u c w o l t u p n in ev d d v , v 5 2 6 . 2 = n i v 0 =0 5 1 -a l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u r n i e c n a t s i s e r t u p n i l a i t n e r e f f i d) n i n , n i (t v - o t - n i0 40 50 6 ? v h i e g a t l o v h g i h t u p n i) n i n , n i (2 . 1v d d v v l i e g a t l o v w o l t u p n i) n i n , n i (0v h i 5 1 . 0 -v v n i g n i w s e g a t l o v t u p n i 5 1 . 08 . 2v v c a _ f e r e g a t l o v e c n e r e f e rv d d 2 4 . 1 -v d d 7 3 . 1 -v d d 2 3 . 1 -v v n i _ f f i d g n i w s e g a t l o v t u p n i l a i t n e r e f f i d 3 . 04 . 3v i n i 1 e t o n ; t n e r r u c t u p n i) n i n , n i (5 3a m . n g i s e d y b d e e t n a r a u g : 1 e t o n
idt ? / ics ? lvds fanout buffer 5 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer t able 4d. lvds dc c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c t able 5. ac c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c l o b m y sr e t e m a r a pn o i t i d n o cm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o m u m i x a m 2 >z h g t d p ; ) l a i t n e r e f f i d ( ; y a l e d n o i t a g a p o r p 1 e t o n 5 7 20 9 30 1 5s p t ) o ( k s4 , 2 e t o n ; w e k s t u p t u o 5 2s p t ) p p ( k s4 , 3 e t o n ; w e k s t r a p - o t - t r a p 0 0 2s p t t i j ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r : e g n a r n o i t a r g e t n i z h m 0 2 - z h k 2 1 2 . 0 idt ? / ics ? lvds fanout buffer 6 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer a dditive p hase j itter additive phase jitter @ 200mhz (12khz to 20mhz) = <0.2ps (typical) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 1k 10k 100k 1m 10m 100m the spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dbc phase noise. this value is normally expressed using a phase noise plot and is most often the specified plot in many applications. phase noise is defined as the ratio of the noise power present in a 1hz band at a specified offset from the fundamental frequency to the power value of the fundamental. this ratio is expressed in decibels (dbm) or a ratio of the power in the 1hz as with most timing specifications, phase noise measurements have issues. the primary issue relates to the limitations of the equipment. often the noise floor of the equipment is higher than the noise floor of the device. this is illustrated above. the device band to the power in the fundamental. when the required offset is specified, the phase noise is called a dbc value, which simply means dbm at a specified offset from the fundamental. by investigating jitter in the frequency domain, we get a better understanding of its effects on the desired application over the entire time record of the signal. it is mathematically possible to calculate an expected bit error rate given a phase noise plot. meets the noise floor of what is shown, but can actually be lower. the phase noise is dependant on the input source and measurement equipment. o ffset f rom c arrier f requency (h z ) ssb p hase n oise dbc/h z
idt ? / ics ? lvds fanout buffer 7 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer p arameter m easurement i nformation o utput l oad ac t est c ircuit d ifferential i nput l evel o utput s kew p art - to -p art s kew o utput r ise /f all t ime p ropagation d elay gnd nin v dd in scope qx nqx lvds 2.5v5% power supply +? float gnd t sk(pp) t sk(o) nqx qx nqy qy pa r t 1 pa r t 2 nqx qx nqy qy clock outputs 20% 80% 80% 20% t r t f v od t pd nin q0:q3 nq0:nq3 in v ih cross points v in v il v dd
idt ? / ics ? lvds fanout buffer 8 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer s etup & h old t ime t hold t set-up nin in en v in , v out 400mv (typical) v diff_in , v diff_out 800mv (typical) s ingle e nded & d ifferential i nput v oltage s wing o ffset v oltage s etup ? ? ? 100 out out lvds dc input v od /  v od v dd out out lv d s dc input ? ? ? v os /  v os v dd d ifferential o utput v oltage s etup
idt ? / ics ? lvds fanout buffer 9 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer a pplication i nformation lvpecl i nput with b uilt -i n 50 ? ? ? ? ? t erminations i nterface the in /nin with built-in 50 ? terminations accepts lvds, lvpecl, lvhstl, cml, sstl and other differential signals. both v swing and v oh must meet the v pp and v cmr input requirements. figures 1a to 1f show interface examples for the hiperclocks in/nin input with built-in 50 ? terminations driven by the most common driver types. the input interfaces suggested here are examples only. if the driver is from another vendor, use their termination recommendation. please consult with the vendor of the driver component to confirm the driver termination requirements. f igure 1a. h i p er c lock s in/nin i nput with b uilt - in 50 ? ? ? ? ? d riven by an lvds d river f igure 1b. h i p er c lock s in/nin i nput with b uilt - in 50 ? ? ? ? ? d riven by an lvpecl d river in nin vt 2.5v lvds 3.3v or 2.5v zo = 50 ohm zo = 50 ohm receiver with built-in 50 ohm zo = 50 ohm receiver with built-in 50 ohm zo = 50 ohm in nin vt 2.5v 2.5v r1 18 2.5v lvpecl f igure 1e. h i p er c lock s in/nin i nput with b uilt - in 50 ? ? ? ? ? f igure 1c. h i p er c lock s in/nin i nput with b uilt - in 50 ? ? ? ? ? d riven by an o pen c ollector cml d river f igure 1d. h i p er c lock s in/nin i nput with b uilt - in 50 ? ? ? ? ? d riven by a cml d river with b uilt -i n 50 ? ? ? ? ? p ullup zo = 50 ohm 2.5v zo = 50 ohm in nin vt receiver with built-in 50 ohm 2.5v cml - open collector in nin vt receiver with built-in 50 ohm 2.5v zo = 50 ohm zo = 50 ohm cml - built-in 50 ohm pull-up 2.5v f igure 1f. h i p er c lock s in/nin i nput with b uilt - in 50 ? ? ? ? ? d riven by a 3.3v cml d river with b uilt -i n p ullup 2.5v 3.3v receiver with built-in 50 ? zo = 50 ohm zo = 50 ohm c1 c2 in vt nin ref_ac 50 ohm 50 ohm 3.3v lvpecl r5 100 - 200 ohm r5 100 - 200 ohm 2.5v 3.3v receiver with built-in 50 ? zo = 50 ohm zo = 50 ohm c1 c2 in vt nin ref_ac 50 ohm 50 ohm 3.3v cml with built-in pullup
idt ? / ics ? lvds fanout buffer 10 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer o utputs : lvds output all unused lvds outputs can be left floating. we recommend that there is no trace attached. both sides of the differential output pair should either be left floating or terminated. r ecommendations for u nused o utput p ins f igure 2. t ypical lvds d river t ermination 2.5v lvds d river t ermination figure 2 shows a typical termination for lvds driver in characteristic impedance of 100 ? differential (50 ? single) 2.5v 100 ohm differential transmission line 2.5v lvds_driv er r1 100 + - 100 ? ? ? ? ? differential transmission line transmission line environment. for buffer with multiple ldvs driver, it is recommended to terminate the unused outputs.
idt ? / ics ? lvds fanout buffer 11 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer p ower c onsiderations this section provides information on power dissipation and junction temperature for the ICS889832. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ICS889832 is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v dd = 2.5v + 5% = 2.625v, which gives worst case results.  power_ max = v dd_max * i dd_max = 2.625v * 120ma = 315mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming no air flow of and a multi-layer board, the appropriate value is 51.5c/w per table 6 below. therefore, tj for an ambient temperature of 85c with all outputs switching is: 85c + 0.315w * 51.5c/w = 101.2c. this is well below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). t able 6. t hermal r esistance ja for 16-p in vfqfn, f orced c onvection ja vs. 0 air flow (linear feet per minute) 0 multi-layer pcb, jedec standard test boards 51.5c/w
idt ? / ics ? lvds fanout buffer 12 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer r eliability i nformation t ransistor c ount the transistor count for ICS889832 is: 206 pin compatible with sy89832u t able 7. ja vs . a ir f low t able for 16 l ead vfqfn ja vs. 0 air flow (linear feet per minute) 0 multi-layer pcb, jedec standard test boards 51.5c/w
idt ? / ics ? lvds fanout buffer 13 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer p ackage o utline - k s uffix for 16 l ead vfqfn t able 8. p ackage d imensions reference document: jedec publication 95, mo-220 n o i t a i r a v c e d e j s r e t e m i l l i m n i s n o i s n e m i d l l a l o b m y sm u m i n i mm u m i x a m n 6 1 a 0 8 . 00 . 1 1 a 05 0 . 0 3 a e c n e r e f e r 5 2 . 0 b 8 1 . 00 3 . 0 e c i s a b 0 5 . 0 n d 4 n e 4 d 0 . 3 2 d 5 2 . 05 2 . 1 e 0 . 3 2 e 5 2 . 05 2 . 1 l 0 3 . 00 5 . 0
idt ? / ics ? lvds fanout buffer 14 ICS889832ak rev a september 19, 2006 ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer while the information presented herein has been checked for both accuracy and reliability, integrated device technology, incorp orated (idt) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patents, or l icenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extraordinary environmental r equirements are not recommended without additional processing by idt. idt reserves the right to change any circuitry or specifications without notice. idt does not authorize or warrant any idt product for use in life support devices or critical medical instruments. t able 9. o rdering i nformation r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t k a 2 3 8 9 8 8 s c ia 2 3 8n f q f v d a e l 6 1e b u tc 5 8 o t c 0 4 - t k a 2 3 8 9 8 8 s c ia 2 3 8n f q f v d a e l 6 1l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - k a 2 3 8 9 8 8 s c id b tn f q f v " e e r f - d a e l " d a e l 6 1e b u tc 5 8 o t c 0 4 - t k a 2 3 8 9 8 8 s c id b tn f q f v " e e r f - d a e l " d a e l 6 1l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n
innovate with idt and accelerate your future networks. contact: www.idt.com for sales 800-345-7015 408-284-8200 fax: 408-284-2775 for tech support netcom@idt.com 480-763-2056 corporate headquarters integrated device t echnology, inc. 6024 silver creek valley road san jose, ca 95138 united states 800 345 7015 +408 284 8200 (outside u.s.) asia pacific and japan integrated device technology singapore (1997) pte. ltd. reg. no. 199707558g 435 orchard road #20-03 wisma atria singapore 238877 +65 6 887 5505 europe idt europe, limited 321 kingston road leatherhead, surrey kt22 7tu england +44 (0) 1372 363 339 fax: +44 (0) 1372 378851 ? 2006 integrated device technology, inc. all rights reserved. product specifications subject to change without notice. idt, th e idt logo, ics and hiperclocks are trademarks of integrated device technology, inc. accelerated thinking is a service mark of integrated device technology, inc. all other br ands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. printed in usa ICS889832 low skew, 1-to-4 differential-to-lvds fanout buffer


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